JBNU will participate in the large, KRW 37.7 billion national R&D project led by the Ministry of Science and ICT, the "vdW Materials and Process Technology Development Project for High-Integration Semiconductors," to secure core technologies for next-generation semiconductors.

vdW materials have been the subject of explosive research since the discovery of graphene in 2010. They can exhibit excellent electrical properties even at atomic-layer thicknesses, making them attractive as core materials for next-generation semiconductors. However, large-scale demonstration and process technology development are essential for commercialization.

In the global market, Europe’s IMEC and Taiwan’s TSMC are leading the related technologies, but Korea, which possesses one of the world’s foremost semiconductor industry bases, urgently needs to secure technological leadership in this field.

This project is an innovation-challenge-type R&D initiative aiming for world-class standards, and it seeks to develop core materials and process technologies for the implementation of next-generation three-dimensional memory semiconductors.

A total of KRW 37.7 billion will be invested to establish and operate the "3D Stacked vdW Semiconductor Project Group." The research will be conducted from 2025 through December 2030.

This project is the result of long-term joint preparation led by core memory and materials researchers from JBNU and Sungkyunkwan University. It will be implemented as a large-scale industry–university–research consortium involving around 10 universities—including Seoul National University, Yonsei University, and Korea Advanced Institute of Science and Technology (KAIST)—national research institutes such as the Korea Institute of Science and Technology (KIST) and the Korea Institute of Machinery and Materials, and major domestic semiconductor companies.

Sungkyunkwan University, which is responsible for materials synthesis, will operate the project group. JBNU will lead research on memory devices and processes, centered on Professor Heo Geun (Department of Semiconductor Science and Technology / Semiconductor Joint Research Center).

Professor Heo Geun said, "I extend my deep gratitude for the university-level support, including that of Professor Emeritus Jeong Hang-geun and Professor Emeritus Hong Chang-hee, who have worked tirelessly for the success of this project. Low-dimensional vdW-based 3D stacked semiconductor technology represents an important technological turning point that can fundamentally overcome the limits of semiconductor miniaturization. Accordingly, this project group will serve as a national platform to demonstrate this technology."